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The threshold voltage, commonly abbreviated as Vth or VGS (th), of a field-effect transistor (FET) is the minimum gate-to-source voltage differential that is needed to create a conducting path between the source and drain terminals. For an nMOS device at gate-to-source voltages above the threshold voltage ((VGS > Vth) but still below saturation (less than "fully on", (VGS − Vth) > VDS), the transistor is in its 'linear region', also known as ohmic mode, where it behaves like a voltage-controlled variable resistor. When referring to a junction field-effect transistor (JFET), the threshold voltage is often called "pinch-off voltage" instead. This is somewhat confusing since "pinch off" applied to insulated-gate field-effect transistor (IGFET) refers to the channel pinching that leads to current saturation behaviour under high source–drain bias, even though the current is never off. Unlike "pinch off", the term "threshold voltage" is unambiguous and refers to the same concept in any field-effect transistor. ==Basic principles== In n-channel ''enhancement-mode'' devices, a conductive channel does not exist naturally within the transistor, and a positive gate-to-source voltage is necessary to create one. The positive voltage attracts free-floating electrons within the body towards the gate, forming a conductive channel. But first, enough electrons must be attracted near the gate to counter the dopant ions added to the body of the FET; this forms a region with no mobile carriers called a depletion region, and the voltage at which this occurs is the ''threshold voltage'' of the FET. Further gate-to-source voltage increase will attract even more electrons towards the gate which are able to create a conductive channel from source to drain; this process is called ''inversion''. In contrast, n-channel ''depletion-mode'' devices have a conductive channel naturally existing within the transistor. Accordingly, the term 'threshold voltage' does not readily apply to turn such devices 'on', but is used instead to denote the voltage level at which the channel is wide enough to allow electrons to flow easily. This ease-of-flow threshold also applies to p-channel ''depletion-mode'' devices, in which a positive voltage from gate to body/source creates a depletion layer by forcing the positively charged holes away from the gate-insulator/semiconductor interface, leaving exposed a carrier-free region of immobile, negatively charged acceptor ions. In wide planar transistors the threshold voltage is essentially independent of the drain–source voltage and is therefore a well defined characteristic, however it is less clear in modern nanometer-sized MOSFETs due to drain-induced barrier lowering. In the figures, the source (left side) and drain (right side) are labeled ''n+'' to indicate heavily doped (blue) n-regions. The depletion layer dopant is labeled ''NA−'' to indicate that the ions in the (pink) depletion layer are negatively charged and there are very few holes. In the (red) bulk the number of holes ''p = NA'' making the bulk charge neutral. If the gate voltage is below the threshold voltage (top figure), the transistor is turned off and ideally there is no current from the drain to the source of the transistor. In fact, there is a current even for gate biases below the threshold (subthreshold leakage) current, although it is small and varies exponentially with gate bias. If the gate voltage is above the threshold voltage (lower figure), the transistor is turned on, due to there being many electrons in the channel at the oxide-silicon interface, creating a low-resistance channel where charge can flow from drain to source. For voltages significantly above the threshold, this situation is called strong inversion. The channel is tapered when ''VD > 0'' because the voltage drop due to the current in the resistive channel reduces the oxide field supporting the channel as the drain is approached. 抄文引用元・出典: フリー百科事典『 ウィキペディア（Wikipedia）』 ■ウィキペディアで「threshold voltage」の詳細全文を読む スポンサード リンク
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